This course introduces design methodologies for implementing digital systems in programmable logic. The course will build on the basics of the digital logic design course. The students will learn how a Hardware Description Language (HDL) is used to describe and implement hardware. The topics will include (behavioral modeling, dataflow modeling, and structural modeling, and writing test benches for design verification). The students also will learn about computer-aided synthesis and implementation for FPGAs design. Laboratory exercises lead the students through the complete programmable logic design cycle. Each student will prototype a digital system starting with VHDL entry, functional and timing simulations, logic synthesis, device programming, and verification.